2587414

A Robust 0.15/spl mu/m CMOS Technology With CoSi/sub 2/ Salicide And Shallow Trench Isolation

Kawaguchi, H. ; Abiko, H. ; Inoue, K. ; Saito, Y. ; Yamamoto, T. ; Hayashi, Y. ; Masuoka, S. ; One ; Tamura, T. ; Tokunaga, K. ; Yamada, Y. ; Yoshida, K. ; Sakai, I.

ULSI Device Development Laboratories, *Microelectronics Research Laboratory es, NEC Corporation 1120 Shimokuzawa, Sagatnihara, Kanagawa 229, Japan

1997

10-12 June 1997

125

126

English

ieee

VLSI Technology, 1997. Digest of Technical Papers., 1997 Symposium on

4-930813-75-1

conf

10.1109/VLSIT.1997.623730

623730