Novel operation schemes to improve device reliability in a localized trapping storage SONOS-type flash memory

Author

Yeh, C.C. ; Tsai, W.J. ; Lu, T.C. ; Chen, H.Y. ; Lai, H.C. ; Zous, N.K. ; Liao, Y.Y. ; You, G.D. ; Cho, S.K. ; Liu, C.C. ; Hsu, F.S. ; Huang, L.T. ; Chiang, W.S. ; Liu, C.J. ; Cheng, C.F. ; Chou, M.H. ; Chen, C.H. ; Tahui Wang ; Wenchi Ting ; Pan, S. ; Ku

Author_Institution

Technol. Dev. Center, Macronix Int. Co., Ltd., Hsin-Chu, Taiwan

fYear

2003

fDate

8-10 Dec. 2003

Abstract

Over erasure, charge gain in the low Vt state, and charge loss in the high Vt state are found to be the most severe reliability issues in a localized trapping storage flash memory cell. In this paper, based on our understanding of physical mechanisms, we demonstrate that by adding vertical electrical field treatments during program/erase operations, the over erasure and data retentivities in high/low Vt states are significantly improved.

Keywords

electron traps; flash memories; hole traps; integrated circuit reliability; SONOS-type flash memory cell; charge gain; charge loss; data retention; device reliability; erase operation; flash memory operation schemes; localized trapping storage; over erasure; oxide-nitride-oxide gate dielectric; program operation; vertical electrical field treatment; Annealing; Dielectrics; Electron traps; Electronics industry; Failure analysis; Flash memory; Flash memory cells; Hot carriers; Industrial electronics; Performance gain;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 2003. IEDM '03 Technical Digest. IEEE International

Conference_Location

Washington, DC, USA

Print_ISBN

0-7803-7872-5

Type

conf

DOI

10.1109/IEDM.2003.1269204

Filename

1269204