Title :
Fabrication Of 0.06 /spl mu/m Poly-si Gate Using Duv Lithography With A Designed Si/sub x/O/sub y/N/sub z/ Film As An Arc And Hardmask
Author :
Wei W.Lee ; Qizhi He ; Hanratty, M. ; Rogers, D. ; Chatterjee, A. ; Kraft, R. ; Chapman, R.A.
Author_Institution :
Texas Instruments, Semiconductor Process and Device Center, MS944, PO Box 655621, Dallas, TX 75243
Conference_Titel :
VLSI Technology, 1997. Digest of Technical Papers., 1997 Symposium on
Print_ISBN :
4-930813-75-1
DOI :
10.1109/VLSIT.1997.623733
