• DocumentCode
    2587971
  • Title

    Have I really met timing? - validating primetime timing reports with SPICE

  • Author

    Thiel, Tobias

  • Author_Institution
    Semicond. Products Sector, Motorola GmbH, Munich, Germany
  • Volume
    3
  • fYear
    2004
  • fDate
    16-20 Feb. 2004
  • Firstpage
    114
  • Abstract
    At sign-off everybody is wondering about how good the accuracy of the static timing analysis timing reports generated with primetime® really is. Errors can be introduced by STA setup, interconnect modeling, library characterization etc. The claims that path timing calculated by primetime usually is within a few percent of spice don´t help to ease your uncertainty. When the signal integrity features were introduced to primetime there was also a feature added that was hardly announced: primetime can write out timing paths for simulation with spice that can be used to validate the timing numbers calculated by primetime. By comparing the numbers calculated by primetime to a simulation with spice for selected paths the designers can verify the timing and build up confidence or identify errors. This paper will describe a validation flow for primetime timing reports that is based on extraction of the spice paths, starting the spice simulation, parsing the simulation results, and creating a report comparing primetime and spice timing. All these steps are done inside the TCL environment of primetime. It will describe this flow, what is needed for the spice simulation, how it can be set up, what can go wrong, and what kind of problems in the STA can be identified.
  • Keywords
    SPICE; timing; PrimeTime timing reports; SPICE simulation; error identification; signal integrity features; simulation program with integrated circuit emphasis; static timing analysis; timing validation; CMOS technology; Degradation; Delay estimation; Integrated circuit interconnections; Libraries; Licenses; SPICE; Semiconductor device modeling; Timing; Wires;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings
  • ISSN
    1530-1591
  • Print_ISBN
    0-7695-2085-5
  • Type

    conf

  • DOI
    10.1109/DATE.2004.1269216
  • Filename
    1269216