IC implementation of spike-timing-dependent synaptic plasticity model using low capacitance value

A number of recent studies on neural networks have been conducted with the purpose of applying engineering to the brain. An artificial neural networks (ANNs) were created that focus on how learning is achieved. In this paper, we focus on spike-timing-dependent synaptic plasticity (STDP) and construct an STDP model using semiconductors. We propose a new STDP model using a low capacitance value with CMOS technology, and show that the proposed integrated circuit has similar characteristics to biological neural networks.