Performance enhancement of 0.13/spl mu/m In/sub 0.65/GaAs PHEMT by reduction of parasitic effect using novel double-deck shaped (DDS) gate structure

High performance 0.13 /spl mu/m In/sub 0.65/GaAs PHEMTs have been realized utilizing novel double-deck shaped (DDS) gate technology. By etching an additionally grown InGaAs contact layer through the initial line opening of the gate foot and forming a T-gate structure on top of the initial line, namely the DDS gate, a remarkable suppression of gate fringing capacitance could be obtained, which also led to an improvement of device microwave performance. Moreover, a large reduction of gate hole current, due to the impact ionization in the strained InGaAs channel layer, was achieved by operating the device in quasi enhancement mode region, which could be realized by removing InP etch-stopper selectively through a low damaged Ar-based RIE. These features enabled the suppression of the kink effect and enhanced the on-state breakdown voltage (BV/sub DS,ON/) in a DC I-V transfer curve.