• DocumentCode
    25910
  • Title

    Design of 2 \\times {\\rm V}_{\\rm DD} -Tolerant I/O Buffer With PVT Compensation Realized by Only 1 \\ti</h1></div></div>
        </li>
        <li class='list-group-item border-0 py-3 px-0'>
            <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Author</span></div><div class='col-12 col-md-9 leftDirection leftAlign'><h2 class='mb-0 fw-semibold'>Ming-Dou Ker ; Po-Yen Chiu</h2></div></div>
        </li>
        <li class='list-group-item border-0 py-3 px-0'>
            <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Author_Institution</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>Inst. of Electron., Nat. Chiao-Tung Univ., Hsinchu, Taiwan</div></div>
        </li>
        <li class='list-group-item border-0 py-3 px-0'>
            <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Volume</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>60</div></div>
        </li>
        <li class='list-group-item border-0 py-3 px-0'>
            <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Issue</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>10</div></div>
        </li>
        <li class='list-group-item border-0 py-3 px-0'>
            <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>fYear</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>2013</div></div>
        </li>
        <li class='list-group-item border-0 py-3 px-0'>
            <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>fDate</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>Oct. 2013</div></div>
        </li>
        <li class='list-group-item border-0 py-3 px-0'>
            <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Firstpage</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>2549</div></div>
        </li>
        <li class='list-group-item border-0 py-3 px-0'>
            <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Lastpage</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>2560</div></div>
        </li>
        <li class='list-group-item border-0 py-3 px-0'>
            <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Abstract</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>A new 2×V<sub>DD</sub>-tolerant input/output (I/O) buffer with process, voltage, and temperature (PVT) compensation is proposed and verified in a 90-nm CMOS process. Consisting of the dynamic source bias and gate controlled technique, the proposed mixed-voltage I/O buffer realized by only 1 xV<sub>DD</sub> devices can successfully transmit and receive 2×V<sub>DD</sub> signal. Utilizing this technique with only 1 xV<sub>DD</sub> devices, the digital logic gates are also modified to have 2 xV<sub>DD</sub>-tolerant capability. With 2 V<sub>DD</sub>-tolerant logic gates, the PVT variation detector has been implemented to detect PVT variations from 2×V<sub>DD</sub> signal and provide compensation control to the 2×V<sub>DD</sub>-tolerant I/O buffer without suffering the gate-oxide overstress issue.</div></div>
        </li>
        <li class='list-group-item border-0 py-3 px-0'>
            <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Keywords</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>CMOS logic circuits; buffer circuits; compensation; logic gates; CMOS process; PVT compensation; V<sub>DD</sub> thin-oxide device; V<sub>DD</sub>-tolerant I-O buffer; V<sub>DD</sub>-tolerant input-output buffer; V<sub>DD</sub>-tolerant logic gate; digital logic gates; dynamic source bias; gate controlled technique; gate-oxide overstress; mixed-voltage I-O buffer; process-voltage-temperature compensation; signal receiver; signal transmitter; size 90 nm; CMOS process; Educational institutions; Logic gates; MOSFET; Reliability; Voltage control; Gate-oxide overstress; mixed-voltage I/O buffer; process, voltage, and temperature (PVT) variation;</div></div>
        </li>
        <li class='list-group-item border-0 py-3 px-0'>
            <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>fLanguage</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>English</div></div>
        </li>
        <li class='list-group-item border-0 py-3 px-0'>
            <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Journal_Title</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>Circuits and Systems I: Regular Papers, IEEE Transactions on</div></div>
        </li>
        <li class='list-group-item border-0 py-3 px-0'>
            <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Publisher</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>ieee</div></div>
        </li>
        <li class='list-group-item border-0 py-3 px-0'>
            <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>ISSN</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>1549-8328</div></div>
        </li>
        <li class='list-group-item border-0 py-3 px-0'>
            <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Type</span></div><div class='col-12 col-md-9 leftDirection leftAlign'><h2 class='mb-0 fw-semibold'>jour</h2></div></div>
        </li>
        <li class='list-group-item border-0 py-3 px-0'>
            <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>DOI</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>10.1109/TCSI.2013.2244351</div></div>
        </li>
        <li class='list-group-item border-0 py-3 px-0'>
            <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Filename</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>6609128</div></div>
        </li>
        <div class='list-group-item border-0 py-3 px-0'>
            <div class='row g-0 align-items-center'><div class='col-12 col-md-3 fw-bold mb-2 mb-md-0'><span class='text-muted small'>Link To Document</span></div><div class='col-12 col-md-9 leftDirection leftAlign'><a class='text-break' href='https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=25910' target='_blank' rel=https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=25910