An efficient voltage-mode class-D power amplifier for digital transmitters with delta-sigma modulation

Summary form only given, as follows. A high efficiency voltage-mode class-D power amplifier for digital transmitters with delta-sigma modulation is demonstrated using a 0.13-µm 1.2-V silicon-on-insulator CMOS technology. To minimize the overlap of ON time of both the PMOS and the NMOS transistors, a shoot-through current reduction technique was employed. Distortion induced by parasitic inductance was mitigated with integrated on-chip capacitors.