DocumentCode
2595529
Title
Investigation of efficiency and accuracy on incremental SSTA
Author
Kim, Jinwook ; Kim, Wook ; Hwan Kim, Young
Author_Institution
Div. of Electr. & Comput. Eng., Pohang Univ. of Sci. & Technol., Pohang
Volume
2
fYear
2008
fDate
14-17 May 2008
Firstpage
821
Lastpage
824
Abstract
This paper compares the characteristics and performances of incremental statistical static timing analysis (SSTA) methods. In contrast to incremental analysis in the deterministic static timing analysis (STA), timing error is indispensable for an efficient incremental SSTA, and the efficiency and accuracy have a trade-off relation. We compared and analyzed the differences between the incremental STA and SSTA, and presented the error source of the incremental SSTA. From the experimental results by three major incremental analysis methods, we presented the relationship between the efficiency and accuracy in incremental SSTA. We showed as well that all tested incremental SSTA methods give relatively accurate results that errors are lower than 1% with the some sacrifice of the efficiency. However, the merits and demerits of each method differs to that of each others, we compared the merits and demerits of each method.
Keywords
statistical analysis; timing; STA method; incremental SSTA; incremental statistical static timing analysis; timing error; Circuit optimization; Circuit synthesis; Computer errors; Delay effects; Error analysis; Information analysis; Paper technology; Performance analysis; Testing; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology, 2008. ECTI-CON 2008. 5th International Conference on
Conference_Location
Krabi
Print_ISBN
978-1-4244-2101-5
Electronic_ISBN
978-1-4244-2102-2
Type
conf
DOI
10.1109/ECTICON.2008.4600556
Filename
4600556
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