Title :
Analysis of probing effects on solder bump
Author :
Tsao, Yu-Cheng ; Tang, Jing-Jou ; Hsieh, Ya-Ling
Author_Institution :
Adv. Semicond. Eng. Inc., Kaoshiung, Taiwan
Abstract :
This study is to analyze the effects of probing test on solder bump for flip-chip product and discuss the performance of matrices, bump height, probe mark area, contact force, contact probe times, and cleaning pin period. Experimental results show that the coplanarity and structure of solder bumps would be damaged when the contact force and probing times exceed 6 mils and 3 times, respectively. The ASE Company has proved the prediction model is successful on improving the test quality of known good die (KGD) products based on the work of P. Spletter and C. Reber (Proc. IEEE 6th Multichip Modules Conf., p.240-44, April 1997).
Keywords :
flip-chip devices; integrated circuit testing; soldering; ASE Company; bump height; cleaning pin period; contact force; contact probe times; flip-chip product; prediction model; probe mark area; probe testing; probing effects; solder bump; test quality; Bonding; Cities and towns; Cleaning; Consumer electronics; Performance analysis; Probes; Semiconductor device packaging; Shape; Testing; Wafer scale integration;
Conference_Titel :
Electronics Packaging Technology Conference, 2004. EPTC 2004. Proceedings of 6th
Print_ISBN :
0-7803-8821-6
DOI :
10.1109/EPTC.2004.1396623
