An energy efficient, high speed analog FFT processor for MB-OFDM UWB receivers

In this paper, we present an energy efficient, and high speed analog fast Fourier transform (FFT) processor for Multi-Band Orthogonal Frequency Division Multiplexing (MB-OFDM) Ultrawideband (UWB) systems, although it is generally applicable to many other OFDM based receiver systems. The proposed high-speed, low power FFT architecture can provide higher throughput rate by using analog CMOS current mirrors structure in comparison to common digital types. The proposed processor has been designed and simulated using TSMC 180 nm CMOS technology with a supply voltage of 1.8 V. In the case of the IEEE 802.15.3aUWB receiver, computation time of FFT 128-point is 242.42 ns. Computation time of our FFT processor is 24 ns and consumes only 1.7 mW. By using the proposed analog design, an ADC (analog to digital converter) will be replaced by a simple sample-and-hold (S/H) circuit in a way that the power consumption and the complexity will be decreased remarkably. According to the high speed and low power consumption properties of this FFT processor, it can be used in other known standards such as 802.15.3c, 802.11ac and 802.11ad.