Deposited Dielectric Profiles in Complex Semiconductor Circuits

DEPOSITED DIELECTRIC PROFILES-IN COMPLEX SEMICONDUCTOR CIRCUITS Oxide profiles are a critical parameter in a production of reliable multi-layer monolithic circuits. These deposited dielectrics serve to insulate overlapping metal layers while simultaneously allowing fabrication of high density circuitry within a minimized die area. Foremost among the desirable qualities of these dielectrics is their ability to adequately cover both metal and oxide on the flat surfaces of the die as well as over the steps. Poor coverage can result in a variety of catastrophic electrical problems which lead to both expensive and inefficient processing. Until recently the direct observation of integrated circuit surfaces has been limited to optical and metalographic methods. Scanning Electron Microscopy provides a useful means of obtaining the detailed and descriptive information necessary to characterize oxide and metal profiles. Three phases of oxide coverage were studies in this program using the Scanning Electron Microscope: (1) Deposited oxide over thermal oxide (2) Deposited oxide over metal patterns (3) Growth profiles of deposited oxides Phase I has shown how deposited oxide replicates its thermal counterpart. Phase II, on the other hand, has yielded valuable information about the effect of underlying metal profiles on oxide deposition. The details of how deposited oxides establish their final configurations have been demonstrated by varying oxide thickness and observing surface profiles in Phase III.