Title :
A mixed-signal Built-In Self-Calibrated Time-Interleaved ADC in 65nm CMOS technology
Author :
Rivet, Francois ; Mariano, Andre ; Dallet, Dominique ; Begueret, J.
Author_Institution :
IMS Lab., Univ. de Bordeaux 1, Talence, France
Abstract :
Analog-to-Digital (A/D) conversion is faced with strong requirements in terms of resolution and frequency. Time-Interleaved Analog-to-Digital Converters (TIADC) are popular because they offer a higher sampling frequency. But, their architecture introduces errors that affect the resolution of conversion. This paper presents a built-in method of calibration dedicated to TIADC. Mixed-simulations are performed merging transistor-level in 65nm CMOS technology and behavioral blocks in VHDL-AMS language to validate the feasibility of a Built-In Self-Calibration (BISC) system which corrects offset, gain and timing error. Technological constraints of the analog part of the BISC circuitry are highlighted. An orthogonal calibration is applied in a 4-ADC TIADC system and a detailed choice of the methodology is described.
Keywords :
CMOS integrated circuits; analogue-digital conversion; built-in self test; calibration; hardware description languages; A/D conversion; BISC circuitry; BISC system; CMOS technology; TIADC; VHDL-AMS language; analog-to-digital conversion; behavioral blocks; built-in self-calibration system; mixed-signal built-in self-calibrated time-interleaved ADC; mixed-simulations; orthogonal calibration; sampling frequency; size 65 nm; technological constraints; time-interleaved analog-to-digital converters; transistor-level; CMOS integrated circuits; Calibration; Clocks; Converters; Inverters; Switches; Timing; analog signal processing; analog-to-digital conversion; built-in self-calibration; hadamard sequences; orthogonal calibration;
Conference_Titel :
NEWCAS Conference (NEWCAS), 2010 8th IEEE International
Conference_Location :
Montreal, QC
Print_ISBN :
978-1-4244-6806-5
Electronic_ISBN :
978-1-4244-6804-1
DOI :
10.1109/NEWCAS.2010.5603954
