Title :
Clock-free nanowire crossbar architecture based on Null Convention Logic (NCL)
Author :
Bonam, Ravi ; Chaudhary, Shikha ; Yellambalase, Yadunandana ; Choi, Minsu
Author_Institution :
Dept of ECE, Univ. of Missouri-Rolla, Rolla, MO
Abstract :
There have been numerous nanowire crossbar architectures proposed till date, although all of them are envisioned to be synchronous (i.e., clocked). The clock is an important part in a circuit and it needs to be connected to all the components to synchronize their operation. Considering non-deterministic nature of nanoscale integration, realizing them on a nano wire crossbar system would be quite cumbersome. Unlike the conventional clocked counterparts, a new clock-free crossbar architecture is proposed to resolve the issues with clocked counterparts in this paper, where the use of clock is eliminated from the architecture. This has been done by implementing delay-insensitive logic encoding technique called Null Convention Logic (NCL). A delay-insensitive full adder has been implemented on the proposed architecture to demonstrate the feasibility in this paper.
Keywords :
adders; encoding; logic circuits; logic design; nanostructured materials; nanotechnology; clock-free nanowire crossbar architecture; delay-insensitive full adder; delay-insensitive logic encoding; null convention logic; Circuit faults; Clocks; Computer aided manufacturing; Computer architecture; Encoding; Logic; Nanoscale devices; Nanotechnology; Robustness; Wires; Asynchronous computing; Defect & fault-tolerance; Manufacturability; Nanowire crossbar; Null convention logic (NCL); Robustness; Scalability;
Conference_Titel :
Nanotechnology, 2007. IEEE-NANO 2007. 7th IEEE Conference on
Conference_Location :
Hong Kong
Print_ISBN :
978-1-4244-0607-4
Electronic_ISBN :
978-1-4244-0608-1
DOI :
10.1109/NANO.2007.4601146