DocumentCode :
2603685
Title :
Application of the latency insertion method to electro-thermal circuit analysis
Author :
Klokotov, D. ; Schutt-Ainé, J. ; Beyene, W. ; Mullen, D. ; Li, M. ; Schmitt, R. ; Yang, L.
Author_Institution :
Dept. of ECE, UIUC, Urbana, IL, USA
fYear :
2011
fDate :
23-26 Oct. 2011
Firstpage :
263
Lastpage :
266
Abstract :
In this paper, a fast circuit simulation technique based on the Latency Insertion Method (LIM) is proposed for the electro-thermal analysis of circuits and high-performance systems. The method is applied to the modeling of on-chip and off-chip 3D-interconnect networks. The proposed method is shown to be capable of modeling both electrical and thermal phenomena occurring in high speed, high performance VLSI circuits at the pre-layout design stages.
Keywords :
integrated circuit design; integrated circuit interconnections; thermal analysis; three-dimensional integrated circuits; 3D interconnect network; VLSI circuits; electrical phenomena; electro-thermal circuit analysis; fast circuit simulation technique; latency insertion method; prelayout design; thermal phenomena; Computational modeling; Heating; Integrated circuit modeling; Solid modeling; Steady-state; Substrates; Thermal analysis; IR drop; circuit simulation; electro-thermal analysis; latency insertion; power integrity;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Performance of Electronic Packaging and Systems (EPEPS), 2011 IEEE 20th Conference on
Conference_Location :
San Jose, CA
ISSN :
pending
Print_ISBN :
978-1-4244-9398-2
Electronic_ISBN :
pending
Type :
conf
DOI :
10.1109/EPEPS.2011.6100242
Filename :
6100242
Link To Document :
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