Title :
A VLSI architecture for vector quantization with optimal search
Author :
Kok, C.W. ; Chan, S.C. ; Chau, C.W. ; Law, S.P.
Author_Institution :
Dept. of Electron. Eng., City Polytech. of Hong Kong, Kowloon Tong, Hong Kong
Abstract :
A VLSI architecture for vector quantization (VQ) problems such as real-time image coding is proposed. The encoding process applied is independent of the vector dimensions and does not perform any arithmetic operations. Each processing elements in the VLSI is a magnitude comparator. The decision tree is generated by an offline process. Together with pipeline architecture, high-speed encoding is now realizable in a single chip
Keywords :
VLSI; digital signal processing chips; image coding; image processing equipment; pipeline processing; real-time systems; vector quantisation; VLSI architecture; decision tree; encoding process; high-speed encoding; magnitude comparator; optimal search; pipeline architecture; real-time image coding; vector quantization; Arithmetic; Cities and towns; Decision trees; Electronic mail; Encoding; Image coding; Semiconductor device measurement; Speech coding; Vector quantization; Very large scale integration;
Conference_Titel :
Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on
Conference_Location :
Chicago, IL
Print_ISBN :
0-7803-1281-3
DOI :
10.1109/ISCAS.1993.393811
