DocumentCode :
2606061
Title :
A CMOS/SOS Reliability Study
Author :
Smith, Jack S. ; Talada, Donald D.
Author_Institution :
Lockheed Palo Alto Research Laboratory, Palo Alto CA 94304
fYear :
1976
fDate :
27851
Firstpage :
23
Lastpage :
32
Abstract :
With over 100,000 hours of reliability testing of complementary metal oxide semiconductor devices built on sapphire substrates, a pattern of failure mechanisms has emerged. Not surprisingly, the well known gate oxide charge instabilities and gate oxide shorts commonly found in CMOS are also present in this latest technology innovation. The sapphire technology has added to these failure mechanisms several problems related to the input protective network and the so called back-channel leakage current stemming from the silicon-sapphire interface.
Keywords :
CMOS technology; Circuit testing; Failure analysis; Integrated circuit measurements; Manufacturing; Protection; Semiconductor device reliability; Substrates; Temperature; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Reliability Physics Symposium, 1976. 14th Annual
Conference_Location :
Las Vegas, NV, USA
ISSN :
0735-0791
Type :
conf
DOI :
10.1109/IRPS.1976.362717
Filename :
4208101
Link To Document :
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