Title :
Fast analytical thermal modeling of electronic devices and circuits with multi-layer stack mountings
Author :
Bagnoli, P.E. ; Montesi, M. ; Casarosa, C. ; Pasquinelli, G.
Author_Institution :
Dipt. di Ingegneria dell´´Informazione, Pisa Univ., Italy
Abstract :
In this paper an analytical model for the steady-state temperature mapping of electronic devices and system boards is presented. The main assumptions are that the heat generation may be considered as two-dimensional and that the whole solid structure can be schematically modelled as a stack of several homogeneous layers of different materials and different sizes, also with various degree of asymmetry. This mathematical model is believed to replace conventional finite-elements (FEM) thermal simulators for fast thermal mapping, accurate within 1% and able to run in interaction with electrical and electro-thermal automatic design tools. Its convenience in terms of speed and calculation amounts is due to the fact that it requires 2-D meshing grids only at the interfaces instead of 3-D. The implemented thermal simulation program was validated by comparing the results of given virtual samples with the corresponding temperature and heat flux maps obtained with the FEM analysis. The amount and the origin of the error percentages with respect to the FEM analysis were also investigated as a functions of the free input parameters of the analytical program.
Keywords :
electronic engineering computing; heat sinks; mesh generation; temperature distribution; thermal management (packaging); DJOSER model; FEM analysis; automatic design tools; electronic devices; electrothermal design; fast analytical thermal modeling; heat sink; meshing grid; multilayer stack mountings; steady-state temperature mapping; system boards; thermal simulation program; two-dimensional heat generation; virtual samples; Analytical models; Assembly systems; Circuits; Electronic packaging thermal management; Finite element methods; Mathematical model; Performance analysis; Solid modeling; Steady-state; Temperature;
Conference_Titel :
Electronics Packaging Technology, 2003 5th Conference (EPTC 2003)
Print_ISBN :
0-7803-8205-6
DOI :
10.1109/EPTC.2003.1271572