DocumentCode :
2609070
Title :
Reliability analyses for new improved high performance flip chip BGA packages
Author :
Chong, D.Y.R. ; Goh, K.Y. ; Kapoor, R. ; Sun, Anthony Y S
Author_Institution :
Adv. Package & Design Center, United Test & Assembly Center Ltd (UTAC), Singapore, Singapore
fYear :
2003
fDate :
10-12 Dec. 2003
Firstpage :
695
Lastpage :
700
Abstract :
High pin count and superior thermal dissipation are the main driving factors for high performance IC packages. Flip chip interconnects technology can generally achieve I/O count of more than 500, and large amounts of heat in the silicon chip can be dissipated efficiently through metal heat spreader attachment. A one-piece cavity lid flip chip BGA package with high pin count and targeted reliability has recently been developed by UTAC. However it was found that solder joint reliability could be compromised due to the rigidity resulted by the one-piece cavity lid. A new design of flip chip BGA package (patent pending) has been looked into for improved board level performance. In this new design, the flip chip is over-molded (with the die top surface exposed) before the lid is attached. With the new single flat lid mounted onto the mold compound, the package substrate is thus less rigid under thermal loading. Hence, solder joint integrity enhancement is expected. The structural differences between the two flip chip BGA designs are discussed in this paper along with detailed package reliability results.
Keywords :
ball grid arrays; encapsulation; finite element analysis; flip-chip devices; heat sinks; integrated circuit modelling; integrated circuit reliability; thermal stresses; 40 mm; BGA package reliability; finite element modeling; flip chip interconnects; flip chip packages; heat spreader; over-molded flip chip; single flat lid; solder joint reliability; thermal dissipation; thermal loading; Assembly; Costs; Electronic packaging thermal management; Flip chip; Integrated circuit interconnections; Integrated circuit packaging; Performance analysis; Soldering; Testing; Thermal loading;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Packaging Technology, 2003 5th Conference (EPTC 2003)
Print_ISBN :
0-7803-8205-6
Type :
conf
DOI :
10.1109/EPTC.2003.1271608
Filename :
1271608
Link To Document :
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