DocumentCode :
2611045
Title :
An efficient tolerance design procedure for yield maximization using optimization techniques and neural network
Author :
Chen, Richard M M ; Chan, Wilson W.
Author_Institution :
Dept. of Electron. Eng., City Polytech. of Hong Kong, Kowloon, Hong Kong
fYear :
1993
fDate :
3-6 May 1993
Firstpage :
1793
Abstract :
Various optimization formulations are analyzed for the determination of design parameters and their tolerances to achieve maximum yield and minimum cost. Three approaches for this objective are presented. Through a numerical example, it is concluded that a procedure using a neural network approach followed by a fine tuning algorithm is recommended for efficiency and reliability
Keywords :
circuit optimisation; circuit reliability; design engineering; integrated circuit yield; neural nets; tolerance analysis; design parameters; fine tuning algorithm; minimum cost; neural network; optimization techniques; reliability; tolerance design procedure; yield maximization; Algorithm design and analysis; Constraint optimization; Cost function; Design automation; Design optimization; Lagrangian functions; Monte Carlo methods; Neural networks; Production; Yield estimation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on
Conference_Location :
Chicago, IL
Print_ISBN :
0-7803-1281-3
Type :
conf
DOI :
10.1109/ISCAS.1993.394093
Filename :
394093
Link To Document :
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