Title :
Superpipelined adder designs
Author :
Unwala, Ishaq H. ; Swartzlander, Earl E., Jr.
Author_Institution :
Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
Abstract :
The superpipelining concept is applied to adder designs. Superpipelined designs of ripple carry, carry select, conditional sum, and carry lookahead adders are presented as examples. It is shown that the carry skip adder cannot be superpipelined. Results for the total number of latches required, the number of pipelining stages, and the total gate counts are presented. It is shown that the superpipelined carry lookahead adder is faster and less complex than the other adders
Keywords :
adders; carry logic; flip-flops; pipeline arithmetic; adder designs; carry lookahead adders; carry select; conditional sum; latches; pipelining stages; ripple carry; superpipelining concept; total gate counts; Clocks; Delay; High performance computing; Inverters; Logic design; Logic gates; Pipeline processing; Signal processing; Throughput; Vector processors;
Conference_Titel :
Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on
Conference_Location :
Chicago, IL
Print_ISBN :
0-7803-1281-3
DOI :
10.1109/ISCAS.1993.394105
