Title :
Information caching in the execution of logic programs
Author :
Huang, Chih-Hao ; Juang, Jie-Yong
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Northwestern Univ., Evanston, IL, USA
Abstract :
A model is proposed that integrates information caching into inference procedure. In addition to success results, failure information is also cached in this model to facilitate back-tracking. A logic system based on this model was implemented. Results of running a set of representative logic programs on the system are reported
Keywords :
inference mechanisms; logic programming; backtracking; failure information; inference procedure; information caching; logic programs execution; logic system; model; Computer languages; Computer science; Inference mechanisms; Logic programming; Parallel processing;
Conference_Titel :
Computer Software and Applications Conference, 1991. COMPSAC '91., Proceedings of the Fifteenth Annual International
Conference_Location :
Tokyo
Print_ISBN :
0-8186-2152-4
DOI :
10.1109/CMPSAC.1991.170191