DocumentCode :
2614442
Title :
A position-insensitive finished store buffer
Author :
Gunadi, Erika ; Lipasti, Mikko H.
Author_Institution :
Electr. & Comput. Eng. Dept., Wisconsin Univ., Madison, WI
fYear :
2007
fDate :
7-10 Oct. 2007
Firstpage :
105
Lastpage :
112
Abstract :
This paper presents the finished store buffer (or FSB), an alternative and position-insensitive approach for building a scalable store buffer for an out-of-order processor. Exploiting the fact that only a small portion of in-flight stores are done executing (i.e. finished) and waiting for retirement, we are able to build a much smaller and more scalable store buffer. Our study shows that we only need at most half of the number of entries in a conventional store queue if we buffer only the stores that have finished execution. Entries in the store buffer are allocated at issue and disallocated on retirement. A clever encoder circuit is used to provide positional searches without an explicitly positional queue structure. While reducing the access latency and power consumption significantly, our technique has virtually no detrimental effect on per-cycle performance (IPC).
Keywords :
buffer storage; logic design; microprocessor chips; storage allocation; access latency; encoder circuit; out-of-order processor; per-cycle performance; position-insensitive finished store buffer; power consumption; storage allocation; Buffer storage; CADCAM; Circuits; Computer aided manufacturing; Delay; Energy consumption; Logic; Microprocessors; Out of order; Retirement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Design, 2007. ICCD 2007. 25th International Conference on
Conference_Location :
Lake Tahoe, CA
ISSN :
1063-6404
Print_ISBN :
978-1-4244-1257-0
Electronic_ISBN :
1063-6404
Type :
conf
DOI :
10.1109/ICCD.2007.4601888
Filename :
4601888
Link To Document :
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