DocumentCode :
2615219
Title :
Design and implementation of a novel programmable power monitor chip
Author :
Ge, Binjie ; Wang, Xin´an ; Zhang, Xing ; Feng, Xiaoxing ; Wang, Qingqin
Author_Institution :
Shenzhen Grad. Sch., Key Lab. of Integrated Microsyst. Sci. & Eng. Applic., Peking Univ., Shenzhen, China
fYear :
2010
fDate :
22-24 Sept. 2010
Firstpage :
9
Lastpage :
12
Abstract :
This paper proposes a novel programmable power monitor chip. With only three program pins and without any off-chip devices, the chip has 36-program states by taking different connections for the 3-program pins. The chip can monitor the voltage from 1.5 v to 5.0 v with 0.1 v step. Special SH circuit and current limited digital blocks are employed to achieve ultra low quiescent power. The implementation is based on 2M1P 0.5 μm mixed signal process, the die area is 0.24mm2, and the quiescent current is only 3 uA.
Keywords :
low-power electronics; mixed analogue-digital integrated circuits; power integrated circuits; programmable circuits; SH circuit; current 3 muA; current limited digital blocks; mixed signal process; programmable power monitor chip; size 0.5 mum; ultra low quiescent power; voltage 0.1 V; voltage 1.5 V to 5.0 V; Capacitors; Clocks; Hysteresis; Low voltage; Monitoring; Pins; Switches; Programmable; low power; power monitor;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronics and Electronics (PrimeAsia), 2010 Asia Pacific Conference on Postgraduate Research in
Conference_Location :
Shanghai
Print_ISBN :
978-1-4244-6735-8
Electronic_ISBN :
978-1-4244-6736-5
Type :
conf
DOI :
10.1109/PRIMEASIA.2010.5604976
Filename :
5604976
Link To Document :
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