Title :
A first-order current-steering sigma-delta modulator
Author :
Comino, Vittorio ; Steyaert, Michael ; Temes, Gabor C.
Author_Institution :
California Univ., Los Angeles, CA, USA
Abstract :
Summary form only given, as follows. A new architecture is presented for a first-order sigma-delta modulator. The system can operate at a high sampling frequency, can be used as a building block for higher-order modulators, and employs circuit techniques that are largely technology-independent. The system was realized in a 2-μm n-well, double-metal single-poly CMOS technology. The circuit occupies an area of 1580×580 μm2. It has a measured resolution of 9 b and a linearity of 13 b at a clock frequency of about 20 MHz and an oversampling ratio of 128. It operates from a power supply of ±2.5 V with a power consumption of 3 mW
Keywords :
CMOS integrated circuits; delta modulation; modulators; 2 micron; circuit techniques; clock frequency; current-steering sigma-delta modulator; double-metal single-poly CMOS technology; first-order modulator; linearity; oversampling ratio; power consumption; power supply; resolution; sampling frequency; CMOS technology; Circuits; Clocks; Delta-sigma modulation; Energy consumption; Frequency; Linearity; Power supplies; Sampling methods;
Conference_Titel :
Circuits and Systems, 1990., IEEE International Symposium on
Conference_Location :
New Orleans, LA
DOI :
10.1109/ISCAS.1990.112234
