Title :
VFAT2 : A front-end “system on chip” providing fast trigger information and digitized data storage for the charge sensitive readout of multi-channel silicon and gas particle detectors.
Author :
Aspell, P. ; Anelli, G. ; Chalmet, P. ; Kaplon, J. ; Kloukinas, K. ; Mugnier, H. ; Snoeys, W.
Author_Institution :
CERN, 1211 Geneva 23, Switzerland
Abstract :
The architecture, key design parameters and results for a highly integrated front-end readout system fabricated as a single ASIC are presented. The chip (VFAT2) comprises complex analog and digital functions traditionally designed as separate components. VFAT2 contains very low noise 128 channel front-end amplification with programmable internal calibration, intelligent “fast OR” trigger building outputs, digital data tagging and storage, data formatting and data packet transmission with error protection. VFAT2 is designed to work in the demanding radiation environments posed by modern high energy physics experiments, in particular the Large Hadron Collider at CERN. Measured results are presented demonstrating full functionality and excellent analog performance despite intensive digital activity on the same piece of silicon.
Keywords :
Application specific integrated circuits; Buildings; Calibration; Intelligent structures; Memory; Protection; Radiation detectors; Silicon; Tagging; Working environment noise;
Conference_Titel :
Nuclear Science Symposium Conference Record, 2008. NSS '08. IEEE
Conference_Location :
Dresden, Germany
Print_ISBN :
978-1-4244-2714-7
Electronic_ISBN :
1095-7863
DOI :
10.1109/NSSMIC.2008.4774696