A Tag based solution for efficient utilization of efuse for memory repair

Efuse or FuseROMs play a major role in embedded memory BIST and repair flows. The trend of increasing demand for SRAMs in SoCs for graphics, DSP and application processors have resulted in the need for more efuses on die to repair these memories. Efuse bit cell is comparatively large in size and does not scale well at lower technology nodes, thus becoming a floor plan nightmare. All these factors call for an efficient use of available efuses. This paper describes the implementation of an efuse compression scheme that identifies repair registers by tags and allocates efuse to only the repair registers that need a repair code. Linked list based data structure was utilized for storing and retrieving repair codes from the FuseROM. This implementation was designed with the goal of achieving good compression when using incremental repair. Analysis indicate compression ratio as high as 88.5% and a max improvement of 35% over RLE based compression schemes with logic overhead of ~10K gates.