Title :
Design of a Rail-to-Rail Constant-gm CMOS Operational Amplifier
Author :
Wu, Zhao ; Rui, Fu ; Zhi-yong, Zhang ; Wei-dong, Cheng
Author_Institution :
Sch. of Inf. Sci. & Technololy, Northwest Univ., Xi´´an, China
fDate :
March 31 2009-April 2 2009
Abstract :
A Constant-gm CMOS operational amplifier with rail-to-rail input common-mode voltage range has been designed. The input stage is based on two pairs of single p-channel differential pairs and two identical n-channel source followers as DC level shifters, which realizes rail-to-rail input swing. To attain a constant-gm over the whole common-mode input range, the compensation circuit which is based on processing signal currents has also been designed. The technique is universal in that the constant-gm can be obtained independent of I-V characteristic and is compatible with deep submicron CMOS devices. Using BSIM3v3 model of a standard 0.6 mum CMOS process, simulation result shows that the input /output swing of the op amp circuit is rail-to-rail. The op-amp achieves open-loop gain of 113.57 dB, unity-gain bandwidth of 11.9 MHz and phase margin of 53deg.
Keywords :
CMOS integrated circuits; compensation; integrated circuit design; operational amplifiers; BSIM3v3 model; CMOS operational amplifier; DC level shifters; I-V characteristic; compensation circuit; constant-gm; deep submicron CMOS devices; n-channel source; op amp circuit; open-loop gain; rail-to-rail input common-mode voltage range; rail-to-rail input swing; signal current processing; single p-channel differential pairs; unity-gain bandwidth; CMOS process; Circuits; Operational amplifiers; Rail to rail amplifiers; Rail to rail inputs; Rail to rail operation; Semiconductor device modeling; Signal design; Signal processing; Voltage; Rail-to-Rail; class-AB; phase margin; unitygain bandwidth;
Conference_Titel :
Computer Science and Information Engineering, 2009 WRI World Congress on
Conference_Location :
Los Angeles, CA
Print_ISBN :
978-0-7695-3507-4
DOI :
10.1109/CSIE.2009.173