DocumentCode
2632359
Title
Register allocation for write activity minimization on non-volatile main memory
Author
Huang, Yazhi ; Liu, Tiantian ; Xue, Chun Jason
Author_Institution
Dept. of Comput. Sci., City Univ. of Hong Kong, Kowloon, China
fYear
2011
fDate
25-28 Jan. 2011
Firstpage
129
Lastpage
134
Abstract
Non-volatile memories are good candidates for DRAM replacement as main memory in embedded systems and they have many desirable characteristics. Nevertheless, the disadvantages of non-volatile memory co-exist with its advantages. First, the lifetime of some of the non-volatile memories is limited by the number of erase operations. Second, read and write operations have asymmetric speed or power consumption in nonvolatile memory. This paper focuses on the embedded systems using non-volatile memory as main memory. We propose register allocation technique with re-computation to reduce the number of store instructions. When non-volatile memory is applied as the main memory, reducing store instructions will reduce write activities on non-volatile memory. With the proposed approach, the lifetime of non-volatile memory is extended accordingly. The experimental results demonstrate that the proposed technique can efficiently reduce the number of store instructions on systems with non-volatile memory by 25% on average.
Keywords
DRAM chips; embedded systems; DRAM replacement; asymmetric speed; embedded systems; erase operations; nonvolatile main memory; power consumption; read operations; register allocation; store instructions; write activity minimization; write operations; Benchmark testing; Image color analysis; Interference; Nonvolatile memory; Random access memory; Registers; Resource management;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference (ASP-DAC), 2011 16th Asia and South Pacific
Conference_Location
Yokohama
ISSN
2153-6961
Print_ISBN
978-1-4244-7515-5
Type
conf
DOI
10.1109/ASPDAC.2011.5722171
Filename
5722171
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