Title :
A self-testing and calibration method for embedded successive approximation register ADC
Author :
Xuan-Lun Huang ; Ping-Ying Kang ; Hsiu-Ming Chang ; Jiun-Lang Huang ; Yung-Fa Chou ; Yung-Pin Lee ; Ding-Ming Kwai ; Cheng-Wen Wu
Author_Institution :
GIEE, Nat. Taiwan Univ., Taipei, Taiwan
Abstract :
This paper presents a self-testing and calibration method for the embedded successive approximation register (SAR) analog-to-digital converter (ADC). We first propose a low cost design-for-test (DfT) technique which tests a SAR ADC by characterizing its digital-to-analog converter (DAC) capacitor array. Utilizing DAC major carrier transition testing, the required analog measurement range is just 4 LSBs; this significantly lowers the test circuitry complexity. Then, we develop a fully-digital missing code calibration technique that utilizes the proposed testing scheme to collect the required calibration information. Simulation results are presented to validate the proposed technique.
Keywords :
analogue-digital conversion; automatic testing; calibration; design for testability; analog-to-digital converter; embedded successive approximation register ADC; fully-digital missing code calibration technique; low cost design-for-test technique; major carrier transition testing; self-testing method; test circuitry complexity; Arrays; Calibration; Capacitors; Linearity; Switches; System-on-a-chip; Testing; ADC calibration; ADC testing; SoC testing; mixed-signal testing; successive approximation register (SAR) ADC;
Conference_Titel :
Design Automation Conference (ASP-DAC), 2011 16th Asia and South Pacific
Conference_Location :
Yokohama
Print_ISBN :
978-1-4244-7515-5
DOI :
10.1109/ASPDAC.2011.5722279