A new multiplier-divider circuit based on switched capacitor data converters

A method for the realization of analog multiplier-divider circuits is presented. The method uses a modified cyclic data converter that operates sequentially as an analog-to-digital converter (ADC) and as a multiplying digital-to-analog converter (DAC) in such a way that it performs the analog operation: ν₀=V_x V_y/V_Z. The salient features of the proposed multiplier-divider circuit are that it is based on a cyclic data converter and it can take advantage of its high precision and small area in a monolithic circuit realized with CMOS switched-capacitor circuits, and that it is a multifunction circuit that operates as a multiplier and as a divider but can also be used as a DAC or ADC in a conventional way