DocumentCode :
263699
Title :
PPMA: Parallel Programming Model for an Audio Application Specific Multi-core DSP
Author :
Xu Jiangwei ; Wei Zhenqi ; Liu Peilin
Author_Institution :
Sch. of Electron. Inf. & Electr. Eng., Shanghai Jiao Tong Univ., Shanghai, China
fYear :
2014
fDate :
13-15 July 2014
Firstpage :
274
Lastpage :
277
Abstract :
In recent years, multi-core digital signal processors (DSPs) have been widely used to improve execution efficiency in a variety of applications. In order to fully explore the parallel processing capacity of DSPs, a well-designed parallel programming model is essential for programmers. In this paper, a parallel programming model for a self-designed multi-core audio DSP (MAD) is proposed based on both shared-memory and message-passing communication mechanisms. A set of application program interfaces (APIs) of PPMA are provided to realize inter-core data transmission and synchronization controlling with high efficiency. To evaluate performance improvement of audio applications using PPMA, a low bit-rate speech codec application is ported to the MAD. With the help of PPMA, task scheduling of speech codec can be implemented conveniently. Experimental results also show that the overhead of inter-core communication in MAD is negligible compared to the parallel speedup achieved by PPMA.
Keywords :
application program interfaces; audio coding; digital signal processing chips; message passing; parallel programming; performance evaluation; scheduling; shared memory systems; speech codecs; API; PPMA; application program interfaces; audio application specific multicore DSP; bit-rate speech codec application; inter-core communication; inter-core data transmission; message-passing communication mechanism; multicore digital signal processors; parallel programming model; performance evaluation; self-designed multicore audio DSP; shared-memory; synchronization controlling; task scheduling; Computational modeling; Computer architecture; Digital signal processing; Message passing; Parallel processing; Programming; Registers; Low Bit-Rate Speech Codec; Message Passing; Multi-Core DSP; Parallel Programming Model; Shared Memory;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel Architectures, Algorithms and Programming (PAAP), 2014 Sixth International Symposium on
Conference_Location :
Beijing
ISSN :
2168-3034
Print_ISBN :
978-1-4799-3844-5
Type :
conf
DOI :
10.1109/PAAP.2014.45
Filename :
6916477
Link To Document :
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