Title :
Four-quadrant Analog Multiplier Based On CMOS Inverters
Author :
Machowski, W. ; Kuta, S. ; Jasielski, J.
Author_Institution :
AGH Univ. of Sci. & Technol.
Abstract :
The paper describes a new four-quadrant analog multiplier CMOS implementation based on CMOS inverters and exploiting quadrature technique. An outstanding feature of this circuit solution is suitability for low voltage operation reaching the extreme for the analog part, since there are only two transistors is tacked in between supply rails. The circuit in question is symmetric driven and fully balanced. The operation principle is described as well as simulation results are presented
Keywords :
CMOS analogue integrated circuits; analogue multipliers; invertors; low-power electronics; CMOS inverters; circuit solution; four-quadrant analog multiplier; low voltage operation; quadrature technique; supply rails; CMOS technology; Circuit simulation; Demodulation; Frequency conversion; Inverters; Low voltage; Paper technology; Rails; Tuned circuits; Very large scale integration;
Conference_Titel :
Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006. Proceedings of the International Conference
Conference_Location :
Gdynia
Print_ISBN :
83-922632-2-7
DOI :
10.1109/MIXDES.2006.1706586
