DocumentCode
2641174
Title
Reliability-Aware System Synthesis
Author
Glaß, Michael ; Lukasiewycz, Martin ; Streichert, Thilo ; Haubelt, Christian ; Teich, Jürgen
Author_Institution
Erlangen-Nuremberg Univ., Erlangen
fYear
2007
fDate
16-20 April 2007
Firstpage
1
Lastpage
6
Abstract
Increasing reliability is one of the most important design goals for current and future embedded systems. In this paper, we will put focus on the design phase in which reliability constitutes one of several competing design objectives. Existing approaches considered the simultaneous optimization of reliability with other objectives to be too extensive. Hence, they firstly design a system, secondly analyze the system for reliability and finally exchange critical parts or introduce redundancy in order to satisfy given reliability constraints or optimize reliability. Unfortunately, this may lead to suboptimal designs concerning other design objectives. Here, we presented: a) a novel approach that considers reliability with all other design objectives simultaneously, b) an evaluation technique that is able to perform a quantitative analysis in reasonable time even for real-world applications, and c) experimental results showing the effectiveness of our approach
Keywords
embedded systems; high level synthesis; integrated circuit design; integrated circuit reliability; redundancy; design objectives; design phase; embedded systems; evaluation technique; optimized reliability; quantitative analysis; redundancy; reliability constraints; reliability-aware system synthesis; Aerospace electronics; Automotive engineering; Circuit faults; Constraint optimization; Design optimization; Field programmable gate arrays; Integrated circuit reliability; Redundancy; Reliability engineering; Single event upset;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation & Test in Europe Conference & Exhibition, 2007. DATE '07
Conference_Location
Nice
Print_ISBN
978-3-9810801-2-4
Type
conf
DOI
10.1109/DATE.2007.364626
Filename
4211831
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