Title :
A CMOS flash TDC with 0.84 – 1.3 ps resolution using standard cells
Author :
Yamaguchi, Takahiro J. ; Komatsu, Satoshi ; Abbas, Mohamed ; Asada, Kunihiro ; Mai-Khanh, Nguyen Ngoc ; Tandon, James
Author_Institution :
Advantest Labs., Advantest Labs., Ltd., Sendai, Japan
Abstract :
This paper proposes a new flash time-to-digital converter (TDC) design, which incorporates deterministic, variable delay into the decision elements. These are implemented with cross-coupled NAND standard cells of variable transistor widths. Both experiment and simulation are used to validate this new design, which provides variable time-difference ranges by controlling the input slew rate. It is also possible to use the proposed flash TDC as a soft macro.
Keywords :
CMOS logic circuits; NAND circuits; analogue-digital conversion; logic design; CMOS flash TDC design; CMOS flash time-to-digital converter design; cross-coupled NAND standard cells; input slew rate; standard cells; variable transistor widths; CMOS integrated circuits; Calibration; Delay; Logic gates; Semiconductor device measurement; Transistors; arbiter; deterministic variable delay; flash TDC; slope control;
Conference_Titel :
Radio Frequency Integrated Circuits Symposium (RFIC), 2012 IEEE
Conference_Location :
Montreal, QC
Print_ISBN :
978-1-4673-0413-9
Electronic_ISBN :
1529-2517
DOI :
10.1109/RFIC.2012.6242338
