DocumentCode :
2643909
Title :
Demonstration of non-volatile working memory through interface engineering in STT-MRAM
Author :
Yoshida, C. ; Ochiai, T. ; Iba, Y. ; Yamazaki, Y. ; Tsunoda, K. ; Takahashi, A. ; Sugii, T.
Author_Institution :
Low-power Electron. Assoc. & Project (LEAP), Tsukuba, Japan
fYear :
2012
fDate :
12-14 June 2012
Firstpage :
59
Lastpage :
60
Abstract :
We engineered the interface of the MgO barrier prepared by post-oxidation of Mg metal to improve structural and electronic properties of magnetic tunnel junctions (MTJs). Drastic improvements in magnetoresistance ratio (MR) and switching voltage (Vc) with low resistance area product (RA) were achieved by inserting CoFe seed layer under the oxidized barrier. The MTJ satisfied over 1016 write cycles at 10 ns pulse under the operation voltage of 0.65 V. From these results, we have verified for the first time the hypothesis that a spin transfer torque magnetoresistance random access memory (STT-MRAM) is suitable for a non-volatile working memory.
Keywords :
MRAM devices; magnesium compounds; magnetic tunnelling; random-access storage; MTJ; MgO; STT-MRAM; electronic properties; interface engineering; low resistance area product; magnetic tunnel junctions; magnetoresistance ratio; nonvolatile working memory; postoxidation; seed layer; spin transfer torque magnetoresistance random access memory; structural properties; switching voltage; time 10 ns; voltage 0.65 V; Annealing; Breakdown voltage; Electric breakdown; Magnetic tunneling; Nonvolatile memory; Oxidation; Voltage measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology (VLSIT), 2012 Symposium on
Conference_Location :
Honolulu, HI
ISSN :
0743-1562
Print_ISBN :
978-1-4673-0846-5
Electronic_ISBN :
0743-1562
Type :
conf
DOI :
10.1109/VLSIT.2012.6242460
Filename :
6242460
Link To Document :
بازگشت