DocumentCode :
2643945
Title :
Towards Unifying Localization and Explanation for Automated Debugging
Author :
Fey, Görschwin ; Sülflow, André ; Drechsler, Rolf
Author_Institution :
Inst. of Comput. Sci., Univ. of Bremen, Bremen, Germany
fYear :
2010
fDate :
13-15 Dec. 2010
Firstpage :
3
Lastpage :
8
Abstract :
Today, there exist powerful algorithms for automated debugging. Some of the debugging algorithms focus on fault localization while others try to explain the faulty behavior by providing, e.g., correct traces that are similar to a failure trace. SAT-based debugging locates faults, but does not explain the faulty behavior, e.g., some temporal properties of fault candidates are not fully explored. In this work, we study the resolution of SAT-based debugging with respect to its capability to locate faults and to explain faults. A strategy is presented that increases the diagnostic resolution of SAT-based debugging by combining fault localization and fault explanation in one algorithm. The experimental results confirm the strength of the approach and give directions for further research.
Keywords :
program debugging; software fault tolerance; SAT-based debugging; automated debugging; diagnostic resolution; fault explanation; fault localization; Accuracy; Benchmark testing; Circuit faults; Debugging; Hardware design languages; Logic gates; Signal resolution; Debugging; Explanation; Localization; SAT; Verification;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microprocessor Test and Verification (MTV), 2010 11th International Workshop on
Conference_Location :
Austin, TX
ISSN :
1550-409
Print_ISBN :
978-1-61284-287-5
Type :
conf
DOI :
10.1109/MTV.2010.10
Filename :
5976209
Link To Document :
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