DocumentCode :
2645788
Title :
AFTA: A formal delay model for functional timing analysis
Author :
Chandramouli, V. ; Whittemore, Jesse P. ; Sakallah, Karem A.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA
fYear :
1998
fDate :
23-26 Feb 1998
Firstpage :
350
Lastpage :
355
Abstract :
Despite its importance, we find that a rigorous theoretical foundation for performing timing analysis has been lacking so far. As a result, we have initiated a research project that aims to provide such a foundation for functional timing analysis. As part of this work we have developed an abstract automaton based delay model that accounts for the various analog factors affecting delay, such as signal slopes, near simultaneous switching, etc., while at the same rime accounting for circuit functionality. This paper presents this delay model
Keywords :
Boolean functions; SPICE; delays; digital integrated circuits; functional analysis; logic CAD; timing; AFTA; abstract automaton based delay model; analog factors; circuit functionality; formal delay model; functional timing analysis; near simultaneous switching; signal slopes; Automata; Circuit simulation; Computational modeling; Computer science; Delay; Design automation; Real time systems; Semiconductor device modeling; Signal processing algorithms; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation and Test in Europe, 1998., Proceedings
Conference_Location :
Paris
Print_ISBN :
0-8186-8359-7
Type :
conf
DOI :
10.1109/DATE.1998.655881
Filename :
655881
Link To Document :
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