• DocumentCode
    2646797
  • Title

    Formal Design of Decimal Arithmetic Circuits Using Arithmetic Description Language

  • Author

    Watanabe, Yuki ; Homma, Naofumi ; Aoki, Takafumi ; Higuchi, Tatsuro

  • Author_Institution
    Graduate Sch. of Inf. Sci., Tohoku Univ., Sendai
  • fYear
    2006
  • fDate
    12-15 Dec. 2006
  • Firstpage
    419
  • Lastpage
    422
  • Abstract
    This paper presents a formal design of decimal arithmetic circuits using an arithmetic description language called ARITH. The use of ARITH makes possible (i) formal description of arithmetic algorithms including those using unconventional number systems, (ii) formal verification of described arithmetic algorithms, and (iii) translation of arithmetic algorithms to the equivalent HDL descriptions. In this paper, we demonstrate the potential of ARITH through an experimental design of binary coded decimal (BCD) arithmetic circuits
  • Keywords
    arithmetic codes; binary codes; formal languages; formal verification; arithmetic algorithms; arithmetic description language; binary coded decimal arithmetic circuits; equivalent HDL descriptions; formal design; formal verification; Circuits; Data structures; Design for experiments; Digital arithmetic; Equations; Formal verification; Hardware design languages; Signal design; Signal processing; Signal processing algorithms;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Intelligent Signal Processing and Communications, 2006. ISPACS '06. International Symposium on
  • Conference_Location
    Yonago
  • Print_ISBN
    0-7803-9732-0
  • Electronic_ISBN
    0-7803-9733-9
  • Type

    conf

  • DOI
    10.1109/ISPACS.2006.364918
  • Filename
    4212305