DocumentCode :
2648198
Title :
Electrochemical method for defect delineation in thin-film SOI wafers
Author :
Guilinger, T.R. ; Kelly, M.J. ; Medernach, J.W. ; Tsao, S.S. ; Stevenson, J.O. ; Jones, H.D.T.
Author_Institution :
Sandia Nat. Lab., Albuquerque, NM, USA
fYear :
1989
fDate :
3-5 Oct 1989
Firstpage :
93
Lastpage :
94
Abstract :
Summary form only given. An electrochemical method for the identification of defects and metal contamination in silicon wafers is discussed. This method is particularly suited for defect delineation in wafers synthesized for SOI. The procedure is applicable to (100) n-type Si with phosphorus dopant concentration of about 1015/cm3. Electrochemical etching is performed in 5-wt.% hydrofluoric acid utilizing a three-electrode configuration with the front side of the Si controlled at +3 to +5 V vs. a Cu/CuF2 reference electrode. FTIR measurements of n- epitaxial silicon on n+ substrate before and after electrochemical etching show that this procedure does not remove bulk Si. This property of the electrochemical etch makes it ideal for thin-film SOI wafers. Electron microscopy of etched wafers shows that the electrochemical etch produces crystallographic etch pits, 2 to 50 μm in size, formed in discrete regions of high electrochemical activity. Further, spreading resistance profiles indicate that dopant atoms are not selectively etched by this procedure. Electrochemical etch pits do correlate with both structural and impurity defects
Keywords :
Fourier transform spectra; elemental semiconductors; etching; impurity distribution; infrared spectra of inorganic solids; semiconductor technology; semiconductor-insulator boundaries; silicon; transmission electron microscope examination of materials; (100) face; FTIR measurements; HF-H2O solution; Si:P; Si:P wafers; crystallographic etch pits; defect delineation; discrete regions; electrochemical method; electron microscopy observations; elemental semiconductor; etching; high electrochemical activity; identification of defects; impurity defects; metal contamination; n+ substrate; spreading resistance profiles; structural defects; thin-film SOI wafers; three-electrode configuration; Contamination; Crystallography; Electrodes; Electron microscopy; Etching; Pollution measurement; Semiconductor thin films; Silicon; Substrates; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SOS/SOI Technology Conference, 1989., 1989 IEEE
Conference_Location :
Stateline, NV
Type :
conf
DOI :
10.1109/SOI.1989.69782
Filename :
69782
Link To Document :
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