Title :
Design and optimization of Serial communication system interface module
Author :
Yi, Zhou ; Zhonghua, Zhou ; Ligang, Hou ; Wuchen, Wu
Author_Institution :
VLSI & Syst. Lab., Beijing Univ. of Technol., Beijing, China
Abstract :
Serial communication system has been widely used in data communications and control system because of less hardware resources, anti-jamming ability, and easy to implement features. A FPGA-based high performance Serial communication system interface module which includes full functions of UART16550 is designed and optimized based on the communication protocol and working principles in this paper. Various technologies are adopted during the design and optimization procedure, such as the three always block coding style, EDA optimization, circuit optimization, and so on. The frequency of the optimized design is up to 166MHz, and the power consumptionis reduced to 0.147W by 63.9%. The test data at typical baud-rate of 115200 and the analyzed result by using Matlab are presented. The test results indicate that the optimized design can be communicated correctly and steadily.
Keywords :
computer interfaces; data communication equipment; field programmable gate arrays; mathematics computing; EDA optimization; FPGA-based high performance Serial communication system interface module; Matlab; UART16550; anti-jamming ability; block coding style; circuit optimization; communication protocol; control system; data communications; frequency 166 MHz; hardware resources; power 0.147 W; Block codes; Circuit optimization; Circuit testing; Communication system control; Control systems; Data communication; Design optimization; Electronic design automation and methodology; Hardware; Protocols; FPGA; Matlab analyse Timing Optimization; STA; Serial communication;
Conference_Titel :
Computer Engineering and Technology (ICCET), 2010 2nd International Conference on
Conference_Location :
Chengdu
Print_ISBN :
978-1-4244-6347-3
DOI :
10.1109/ICCET.2010.5485403
