Title :
Systolic architectures and applications for nanomagnet logic
Author :
Niemier, M. ; Ju, X. ; Becherer, M. ; Csaba, G. ; Hu, X.S. ; Schmitt-Landsiedel, D. ; Lugli, P. ; Porod, W.
Author_Institution :
Univ. of Notre Dame, Notre Dame, IN, USA
Abstract :
Most NML research has studied small magnet ensembles for interconnect or isolated gates. We discuss how NML might be used to process information, as well as suitable system architecture-to-device architecture mappings. A case study for pattern matching hardware is presented.
Keywords :
CMOS logic circuits; interconnections; pattern matching; NML research; architecture-device architecture mappings; interconnection; isolated gates; nanomagnet logic; pattern matching hardware; process information; systolic architectures; CMOS integrated circuits; Clocks; Logic gates; Pattern matching; Routing; Switches; Wires;
Conference_Titel :
Silicon Nanoelectronics Workshop (SNW), 2012 IEEE
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4673-0996-7
Electronic_ISBN :
2161-4636
DOI :
10.1109/SNW.2012.6243329
