DocumentCode :
2654839
Title :
A fully pipelined CABAC coder using syntax element instructions driving
Author :
Chen, Shenggang ; Chen, Shuming ; Ning, Xi
Author_Institution :
Nat. Univ. of Defense Technol., Changsha, China
fYear :
2009
fDate :
20-23 Oct. 2009
Firstpage :
167
Lastpage :
170
Abstract :
Context-based Adaptive Binary Arithmetic Coder (CABAC) is an essential part in the H.264 main profile video encoder to generate final bitstream. With the development of large-scale parallel H.264 encoder and the high definition video requirement, it increasingly poses a bottleneck in the video encoding path of the parallel encoders. This paper proposes a fully pipelined hardware CABAC coder to speed up the bitstream generation, which is suitable for accelerating a node processor in a manycore chip. The coder employs a CPU-like execution style and using the Syntax Elements Instructions (SEI) to drive the pipeline. Synthesis results with SIMC 0.13 um technology show that with an area of 3.21 K logic gates, 3.5 K RAM bits and 34.375 K ROM bits, this design can achieve a high throughput of 590 Mbps, basically supporting the real-time HD video coding.
Keywords :
adaptive codes; arithmetic codes; binary codes; video coding; H.264 main profile video encoder; context-based adaptive binary arithmetic coder; fully pipelined CABAC coder; hardware accelerator; node processor; syntax element instructions driving; Acceleration; Arithmetic; Encoding; Hardware; High definition video; Large-scale systems; Logic design; Logic gates; Pipelines; Read only memory; CABAC; hardware accelerator; pipeline;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC, 2009. ASICON '09. IEEE 8th International Conference on
Conference_Location :
Changsha, Hunan
Print_ISBN :
978-1-4244-3868-6
Electronic_ISBN :
978-1-4244-3870-9
Type :
conf
DOI :
10.1109/ASICON.2009.5351580
Filename :
5351580
Link To Document :
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