DocumentCode :
2655275
Title :
Optimal-Partition Based code compression for embedded processor
Author :
Yang, Lei ; Zhang, Tiejun ; Wang, Donghui ; Hou, Chaohuan
Author_Institution :
Grad. Univ. of Chinese Acad. of Sci., Beijing, China
fYear :
2009
fDate :
20-23 Oct. 2009
Firstpage :
87
Lastpage :
90
Abstract :
Memory is one of the most restricted resources in embedded system. Code compression techniques address this issue by reducing the code size of programs. Huffman coding is the most common used coding method. But during the process of generating symbols from instruction, an experience-based partition way is usually used, which may cause information redundancy. This paper presents an optimal-partition based code compression (OPCC) method. Markov tree model is used to extract correlation between bits in instruction. A clustering algorithm is proposed to cluster bits with higher correlation into symbols. Experimental results show that this method could improve the average compression ratio by 4.1%. The decoder part is validated in Altera CycloneII FPGA.
Keywords :
Markov processes; codes; field programmable gate arrays; microprocessor chips; trees (mathematics); FPGA; Huffman coding; Markov tree model; clustering algorithm; embedded processor; optimal-partition based code compression; Chaos; Clustering algorithms; Data mining; Decoding; Dictionaries; Embedded system; Field programmable gate arrays; Hardware; Huffman coding; Partitioning algorithms; Cluster; Code compression; Markov module;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC, 2009. ASICON '09. IEEE 8th International Conference on
Conference_Location :
Changsha, Hunan
Print_ISBN :
978-1-4244-3868-6
Electronic_ISBN :
978-1-4244-3870-9
Type :
conf
DOI :
10.1109/ASICON.2009.5351601
Filename :
5351601
Link To Document :
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