DocumentCode
2656971
Title
Analog CMOS/SOI with NMOS-SOI-depletion transistors
Author
Dingwall, Andrew G F ; Hsueh, Fu-Lung ; Hsu, Sheng T.
Author_Institution
David Sarnoff Res. Center, Princeton, NJ, USA
fYear
1989
fDate
3-5 Oct 1989
Firstpage
107
Lastpage
108
Abstract
Summary form only given. Improved analog/SOI A/D converter and opamp performance results were obtained by adding normally-on NMOS-depletion transistors to a standard CMOS/SOS process. The improvement results in part from the low RC time constant substrate tie associated with the structure. Dynamic control of substrate potential (a component of threshold voltage) is important for high-speed processing of millivolt level analog signals. Other advantages are: (1) reduced voltage drop across depletion transistors, allowing wider signal swing and/or reduced operating voltage; (2) higher currents from small, lower-capacitance transistors; (3) superior gain characteristics in saturation; and (4) new circuit options possible with N-depletion transistors
Keywords
CMOS integrated circuits; analogue-digital conversion; integrated circuit technology; linear integrated circuits; operational amplifiers; semiconductor-insulator boundaries; CMOS/SOS process; N-depletion transistors; NMOS-SOI-depletion transistors; analog CMOS/SOI; analog/SOI A/D converter; dynamic control; gain characteristics; high-speed processing; low RC time constant substrate tie; millivolt level analog signals; opamp performance; reduced voltage drop; saturation; substrate potential; Atomic layer deposition; Bandwidth; CMOS process; Capacitance; Circuits; Impedance; MOS devices; Signal processing; Threshold voltage; Voltage control;
fLanguage
English
Publisher
ieee
Conference_Titel
SOS/SOI Technology Conference, 1989., 1989 IEEE
Conference_Location
Stateline, NV
Type
conf
DOI
10.1109/SOI.1989.69789
Filename
69789
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