DocumentCode :
2658424
Title :
DSP implementation of Cholesky decomposition
Author :
Salmela, Perttu ; Happonen, Aki ; Jarvinen, Tuomas ; Burian, Adrian ; Takala, Jarmo
Author_Institution :
Tampere Univ. of Technol.
fYear :
2006
fDate :
24-27 June 2006
Firstpage :
6
Lastpage :
9
Abstract :
Both the matrix inversion and solving a set of linear equations can be computed with the aid of the Cholesky decomposition. In this paper, the Cholesky decomposition is mapped to the typical resources of digital signal processors (DSP) and our implementation applies a novel way of computing the fixed-point inverse square root function. The presented principles result in savings in the number of clock cycles. As a result, the Cholesky decomposition can be incorporated in applications such as 3G channel estimator where short execution time is crucial
Keywords :
digital signal processing chips; matrix decomposition; matrix inversion; 3G channel estimator; Cholesky decomposition; DSP implementation; digital signal processors; execution time; fixed-point inverse square root function; linear equations; matrix inversion; 3G mobile communication; Algorithm design and analysis; Clocks; Digital signal processing; Digital signal processors; Equations; Matrices; Matrix decomposition; Signal processing algorithms; Telecommunication computing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Mobile Future, 2006 and the Symposium on Trends in Communications. SympoTIC '06. Joint IST Workshop on
Conference_Location :
Bratislava
Print_ISBN :
1-4244-0368-5
Type :
conf
DOI :
10.1109/TIC.2006.1708008
Filename :
1708008
Link To Document :
بازگشت