Title :
A 4320p 60fps H.264/AVC intra-frame encoder chip with 1.41Gbins/s CABAC
Author :
Zhou, Dajiang ; He, Gang ; Fei, Wei ; Chen, Zhixiang ; Zhou, Jinjia ; Goto, Satoshi
Author_Institution :
Grad. Sch. of Inf., Production & Syst., Waseda Univ., Kitakyushu, Japan
Abstract :
An H.264/AVC intra-frame video encoder is implemented in 65 nm CMOS. With an efficient intra prediction design, its maximum throughput reaches 1991 Mpixels/s for 7680×4320 p 60 fps video, 9.4× to 32× faster than previous designs. The encoder also incorporates a 1.41 Gbins/s CABAC architecture that has been enhanced by 31%. Moreover, low energy consumption is achieved by the high parallelism and hardware efficiency of this design. 1080p30 encoding dissipates only 2 mW at 0.8 V and 9 MHz.
Keywords :
CMOS integrated circuits; data compression; video coding; CABAC architecture; CMOS process; H.264/AVC intraframe video encoder chip; frequency 9 MHz; intraprediction design; low energy consumption; power 2 mW; size 65 nm; voltage 0.8 V; Educational institutions; Encoding; Hardware; Parallel processing; Random access memory; Table lookup; Throughput;
Conference_Titel :
VLSI Circuits (VLSIC), 2012 Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4673-0848-9
Electronic_ISBN :
978-1-4673-0845-8
DOI :
10.1109/VLSIC.2012.6243836
