DocumentCode :
2670122
Title :
A low power 6-bit current-steering DAC in 0.18-μm CMOS process
Author :
Chakir, Mostafa ; Akhamal, Hicham ; Qjidaa, Hassan
Author_Institution :
Fac. of Sci. Dhar el mehraz, Univ. Sidi Mohamed Ben Abdellah, Fez, Morocco
fYear :
2015
fDate :
25-26 March 2015
Firstpage :
1
Lastpage :
5
Abstract :
In our work we are interested in the design of a new architecture of Current-steering DAC Converter a 6bits, operates at 300MHz sampling rate and 1.8V supply voltage, implemented in 0.18um CMOS technology for Ultra-wideband (UWB) transceivers. This work achieves the static differential non-linearity errors (DNL) and integral non linearity errors (INL) are between 0.0583/-0.0600 LSB and 0.0397/-0.1142 LSB, respectively. The spurious free dynamic range (SFDR) at 300-MSPS remains above 60.60dB for input frequency up to 100 MHz. The Total power dissipation is 944.64 uW with 1.8V power supply. The surface of the DAC is 0.006 mm2.
Keywords :
CMOS analogue integrated circuits; digital-analogue conversion; low-power electronics; transceivers; CMOS process; low power current steering DAC; power 944.64 muW; size 0.18 mum; static differential nonlinearity error; ultrawideband transceiver; voltage 1.8 V; CMOS integrated circuits; CMOS technology; Computer architecture; Digital-analog conversion; Mirrors; Switches; Transistors; Current Steering; DAC; cascode; current mirror;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Intelligent Systems and Computer Vision (ISCV), 2015
Conference_Location :
Fez
Print_ISBN :
978-1-4799-7510-5
Type :
conf
DOI :
10.1109/ISACV.2015.7106175
Filename :
7106175
Link To Document :
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