Title :
Synthesis of Hazard-free Asynchronous Circuits from Generalized Signal-Transition Graphs
Author_Institution :
University of Newcastle upon Tyne
Keywords :
Asynchronous circuits; Circuit synthesis; Control system synthesis; Delay; Encoding; Equations; Integrated circuit interconnections; Petri nets; Signal design; Signal synthesis;
Conference_Titel :
VLSI Design, 1993. Proceedings. The Sixth International Conference on
Print_ISBN :
0-8186-3180-5
DOI :
10.1109/ICVD.1993.669629
