DocumentCode :
2678256
Title :
A Scheme For Synthesizing Testable Vlsi Designs With Minimum Area Overhead
Author :
Mitra, Biswadip ; Chaudhuri, P. Pal
Author_Institution :
Texas Instruments (India) Pvt. Ltd.
fYear :
1993
fDate :
3-6 Jan 1993
Firstpage :
112
Lastpage :
112
Keywords :
Automatic control; Computer architecture; Control system synthesis; Costs; Ear; Instruments; Logic testing; Stochastic processes; System testing; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 1993. Proceedings. The Sixth International Conference on
ISSN :
1063-9667
Print_ISBN :
0-8186-3180-5
Type :
conf
DOI :
10.1109/ICVD.1993.669657
Filename :
669657
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2678256
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